Tutorial 1: Gate Driver Circuit Design for Low-Loss and Highly Reliable Switching of Power Devices
SPEAKER: Prof. Makoto Takamiya (mtaka@iis.u-tokyo.ac.jp)
The University of Tokyo, Japan
Abstract
In power electronics, the shift from silicon to SiC and GaN power devices has increased switching speeds, and electromagnetic interference (EMI) problems have become a serious issue. Against this background, gate driver circuits that drive the gate terminals of power devices have recently attracted attention as a solution to precisely control switching operations. From the viewpoint of IC design, this tutorial will focus on the basic functions of gate driver circuits: amplification, isolation, and protection, and will also introduce the latest research trends, including closed-loop active gate drivers and sensing technology via gate terminals.
Speaker Biography
Makoto Takamiya (Fellow, IEEE) received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Tokyo, Japan, in 1995, 1997, and 2000, respectively. In 2000, he joined NEC Corporation. He joined University of Tokyo, Japan in 2005, where he is now a Professor of Institute of Industrial Science. From 2013 to 2014, he stayed at University of California, Berkeley as a visiting scholar. His research interests include the digital gate driver and sensor ICs for power electronics and the integrated power management circuits for automotive and industrial applications. He is an elected member of the administrative committee in IEEE Solid-State Circuits Society from 2023 to 2025. He is a member of the technical program committee of IEEE Symposium on VLSI Technology and Circuits, IEEE Asian Solid-State Circuits Conference, IEEE European Solid-State Electronics Research Conference, and IEEE International Symposium on Power Semiconductor Devices and ICs. He was a Far East Regional Chair in ISSCC 2020. He was a Distinguished Lecturer of IEEE Solid-State Circuits Society from 2019 to 2020.
Tutorial 2: Wireless Biomedical Sensors -- From ‘Near Zero Power’ to ‘Battery Free'
SPEAKER: Prof. Bo Zhao (zhaobo@zju.edu.cn)
Zhejiang University, China
Abstract
Wireless sensors are widely used in biomedical applications, such as ExG (EEG, EMG, and ECG) monitoring, neural recording, continuous glucose monitoring (CGM), cerebral oxygen monitoring (COM), touch sensing, temperature sensors, etc. A low-power wireless-sensing chip is required to enable a miniature battery size and a long lifetime. However, the battery in a traditional wireless sensor still adds to the overall size and needs periodic replacement. In comparison, battery-free wireless techniques lower the body burden and mitigate the biological responses for wearables and implants, respectively. In addition, the battery-free wireless techniques offer infinite life time for the biomedical sensors. In this talk, the wireless biomedical sensors will be listed and described, from near-zero-power techniques to battery-free techniques, including our recent works published in ISSCC and JSSC.
Speaker Biography
Bo Zhao received the Ph.D. degree from EE Department of Tsinghua University, Beijing, China, in 2011. He worked in National University of Singapore and UC Berkeley (BWRC) from 2013 to 2018. Since 2018, he has been a Professor with the Institute of VLSI Design, Zhejiang University, Hangzhou, China. In 2024, he was rated as Qiushi Distinguished Professor of Zhejiang University. He has authored or coauthored more than 70 articles and book chapters. He holds more than 30 Chinese patents. His research interests include IoT radios, power harvesters, biomedical sensors, wireless systems, and wearable/implantable radios. Dr Zhao was a recipient of the 2017 IEEE Transactions of Circuits and Systems Darlington Best Paper Award, the Design Contest Award of the 2013 IEEE International Symposium on Low Power Electronics and Design, the Best Associate Editor of IEEE Transactions on Circuits and Systems I, as well as the Best Paper Award of the 2024 IEEE International Conference on Integrated Circuits Technologies and Applications (ICTA). He works as the International Technical Program Committee (ITPC) member of ISSCC. He was the Publication Chair for the 2016 IEEE Biomedical Circuits and Systems Conference. He serves as the Chair of IEEE Biomedical and Life Science Circuits and Systems Society, as well as an Associate Editor for the IEEE Transactions on Biomedical Circuits and Systems (2024-now) and IEEE Transactions on Circuits and Systems I (2020-2023). Dr. Zhao also serves as a Committee Member of IEEE/C/SM.
Tutorial 3: Nanowatt Analog Integrated Circuit Design for Edge-AI Systems
SPEAKER: Principal Scientist Yuan Gao (gaoy@a-star.edu.sg)
Agency for Science, Technology and Research (A*STAR), Singapore
Abstract
Edge-AI sensors integrate artificial intelligence capabilities into IoT sensors, creating intelligent sensing systems for diversified applications. A major bottleneck limiting the ubiquitous deployment of Edge-AI sensors is the gap between system power consumption and the desired sensor system lifetime. Achieving ultra-low power consumption is especially critical for the analog circuits, which often account for a significant portion of the overall power budget. This tutorial focuses on nanowatt-level analog circuit design for Edge-AI sensor systems. Key design techniques for essential circuit blocks—including operational amplifiers, comparators, voltage references, and oscillators—will be discussed and analyzed.
Speaker Biography
Dr. Gao received the B.E. and M.E. degrees in electrical engineering from the Huazhong University of Science and Technology, Wuhan, China, in 2000 and 2002, and the Ph.D. degree in electrical engineering from the National University of Singapore, Singapore, in 2008. Since 2007, he has been with the Institute of Microelectronics (IME), Agency for Science, Technology and Research (A*STAR), Singapore. He is currently a principal scientist and the principal investigator for analog and mixed-signal IC development. His primary research areas include energy-efficient analog and mixed-signal IC design in the emerging areas such as intelligent sensor interface, AI hardware, and biomedical microsystem.
Tutorial 4: Understanding Nyquist-Rate High-Speed ADCs: Fundamentals, Challenges and Advances
SPEAKER: Assoc. Prof. Chi-Hang Chan (ivorchan@um.edu.mo)
University of Macau, Macao
Abstract
The insatiable demand for accelerated data acquisition in modern communication systems, radar, and instrumentation has established Nyquist Analog-to-Digital Converters (ADCs) as critical components, capable of directly sampling signals at or near the Nyquist rate. Decades of progress, fueled by technology scaling and innovative architectures, have yielded substantial improvements in both sampling rates and power efficiency. This tutorial provides a systematic review of high-speed, low-power ADC architectures, categorizing core digitization techniques into parallel, sequential, and pipelined approaches. It further examines digital-assisted calibrations, emphasizing lightweight and signal-dependent optimization schemes, while also addressing application-specific challenges such as latency and metastability. The tutorial progresses from fundamental principles to advanced contemporary techniques, concluding with practical design examples.
Speaker Biography
Chi-Hang Chan was born in Macau S.A.R., China, in 1985. He received a bachelor's degree in electrical engineering from the University of Washington (Seattle). He obtained master's and doctoral degrees from the University of Macau in 2012 and 2015, respectively. Currently, he serves as an associate professor at the State Key Laboratory of Analog and Mixed-Signal VLSI at the University of Macau, where he also coordinates microelectronics branches in the Greater Bay Area (GBA). He is the chairman of the IEEE Solid-State Circuits Macau Section Chapter. He has achieved significant recognition for his research in microelectronics. His supervised research work earned the Takuo Sugano Award for Outstanding Far East Paper at the 2024 IEEE International Solid-State Circuits Conference (ISSCC). He also received the first prize in the Science and Technology (Natural Science Award) from the Ministry of Education of the People's Republic of China - Higher Education Institutions Scientific Research Outstanding Achievement Award. Furthermore, he has been awarded the Technology Invention Prize of the Macau Science and Technology Development Fund on five separate occasions. Among his notable accolades, Dr. Chan was the recipient of the 2015 IEEE Solid-State Circuits Society Pre-Doctoral Achievement Award and a co-recipient of the Best Paper Award at the 2014 European Solid-State Circuits Conference. His supervised students won the 2024 IEEE Solid-State Circuits Society Predoctoral Achievement Award and the Outstanding Design Award at the 2020 Asian Solid State Circuits Conference Student Design Competition. Prof. Chan has authored 30 papers in the Journal of Solid-State Circuits (JSSC) and 22 papers at the International Solid-State Circuit Conference (ISSCC), focusing on areas such as data converters, clock circuits, and time-of-flight (ToF) ranging sensing. He is a senior member of IEEE and served as a technical review committee member for the IEEE International Solid-State Circuits Conference 2026 and 2023-2025 Asian Solid-State Circuits Conference. His research interests include high-speed Nyquist ADCs, noise-shaping analog-to-digital converters (ADCs), and low-jitter clock circuits.
Tutorial 5: Computing-in-Memory Processor for Large-Scale AI Models
SPEAKER: Assoc. Prof. Fengbin Tu (fengbintu@ust.hk)
The Hong Kong University of Science and Technology, Hong Kong
Abstract
With the rapid development of large-scale AI models, AI computing has entered a new era. The massive parameter scale and multimodal learning capabilities of large models enable them to handle more complex and general-purpose intelligent tasks, while also raising tremendous demand for high-performance AI processors. However, the frequent and extensive data movement severely restricts the AI processor performance due to the von Neumann bottleneck. Computing-in-memory (CIM) architecture, which deeply integrates compute and memory, offers a promising solution to break through this limitation and achieve a balance between high performance and energy efficiency. However, in the large-scale AI model era, CIM processors face new challenges such as mixed-precision computing, sparsity processing, massive parameter storage, and inter-chip communication. This tutorial will discuss how to design CIM processors with multi-level architecture innovations to tackle these challenges and provide high-performance and efficient support for the large-scale AI model deployment.
Speaker Biography
Fengbin Tu is an Assistant Professor and the Associate Director of the Institute of Integrated Circuits and Systems at The Hong Kong University of Science and Technology, NSFC Excellent Young Scientist, and a core faculty member of the AI Chip Center for Emerging Smart Systems (ACCESS). He received the Ph.D. degree from the Institute of Microelectronics, Tsinghua University in 2019, with the Tsinghua Excellent Dissertation Award. Dr. Tu was a Postdoctoral Scholar at University of California, Santa Barbara, from 2019 to 2022, and a Postdoctoral Fellow at ACCESS, from 2022 to 2023. His research interests include AI chip and computing-in-memory. His AI chips Thinker and ReDCIM have been recognized by the ISLPED Design Contest Award (2017) and Top-10 Research Advances in China Semiconductors (2023). He has received the MIT Technology Review “Innovators Under 35” Asia-Pacific (2025), Gold Medal with Jury Congratulations at the Inventions Geneva (2025), and WAIC Yunfan Award-“Bright Stars” (2024). Dr. Tu’s research has been published at top conferences and journals on integrated circuits and computer architecture, including ISSCC, JSSC, DAC, ISCA, and MICRO.
Tutorial 6: Precision and BW/Power Scalable Sensor Interfaces for IoT Applications
SPEAKER: Prof. Zhong Tang
Xidian University, China
Abstract
IoT applications demand a large number of sensors with precision and energy-efficient sensor interfaces. However, conventional sensor interfaces are typically optimized for a fixed bandwidth, achieving good accuracy and energy efficiency within a narrow operating range. To address this limitation, bandwidth and power-scalable sensor interfaces are essential to maintain good energy efficiency across a wide frequency range, making it more flexible for different use cases. This also facilitates intellectual property (IP) reuse across different industrial products, thus saving design cost and reducing time-to-market. This tutorial reviews the recent development of bandwidth/power scalable sensor interfaces and introduces their key scaling techniques.
Speaker Biography
Zhong Tang received the B.S. and Ph.D. degrees in electrical engineering from Zhejiang University, Hangzhou, China, in 2015 and 2020, respectively. From 2020 to 2023, he was a Postdoc Researcher with Electronic Instrumentation Lab, Delft University of Technology, Delft, The Netherlands. He joined Vango Technologies Inc., Hangzhou, China, from 2023 to 2025 as an Analog IC Design Manager. He is now a researcher with Hangzhou Institute of Technology, Xidian University, Hangzhou, China.
His research interests include precision analog and mixed-signal integrated circuits. This has led to over 40 technical articles, including 8 from the IEEE International Solid-State Circuits Conference (ISSCC) and 7 from the IEEE Journal of Solid-State Circuits (JSSC). Dr. Tang was a recipient of the Outstanding Doctoral Thesis Award of the Chinese Institute of Electronics in 2022.
